cystech electronics corp. spec. no. : c391l3 issued date : 2010.12.06 revised date : page no. : 1/9 MTB20P03L3 cystek product specification p-channel enhancement mode power mosfet MTB20P03L3 bv dss -30v i d -10a r dson(max) 20m description the MTB20P03L3 is a p-channel en hancement-mode mosfet, providing the designer with the best combination of fast switching, ruggedized device de sign, low on-resistance and cost effectiveness. the sot-223 package is universally preferred for a ll commercial-industrial surface mount applications and suited for low voltage applicati ons such as dc/dc converters. features ? r ds(on) =20m @v gs =-10v, i d =-10a r ds(on) =35m @v gs =-5v, i d =-7a ? simple drive requirement ? low on-resistance ? fast switching speed ? pb-free lead plating package equivalent circuit outline MTB20P03L3 sot-223 g d s d g gate s source d drain
cystech electronics corp. spec. no. : c391l3 issued date : 2010.12.06 revised date : page no. : 2/9 MTB20P03L3 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds -30 v gate-source voltage v gs 25 v continuous drain current @ t c =25 c -10 a continuous drain current @ t c =100c i d -8 a pulsed drain current i dm -40 *1 a avalanche current i as -15 a avalanche energy @ l=0.1mh, i d =-10a, r g =25 e as 5 mj repetitive avalanche energy @ l=0.05mh e ar 2.5 *2 mj t a =25 3.3 w total power dissipation t a =100 p d 1.65 w operating junction and storage temp erature range tj, tstg -55~+175 c thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 25 c/w thermal resistance, junction-to-ambient, max r th,j-a 45 *3 c/w note : 1. pulse width limited by maximum junction temperature 2. duty cycle 1% 3. surface mounted on 1 in2 copper pad of fr-4 board, 110 c/w when mounted on minimum copper pad electrical characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -30 - - v v gs =0, i d =-250 a v gs(th) -1 -1.5 -3 v v ds =v gs , i d =-250 a i gss - - 100 na v gs =25v, v ds =0 i dss - - -1 a v ds =-24v, v gs =0 i dss - - -10 a v ds =-20v, v gs =0, tj=125 c i d(on) *1 -40 - - a v ds =-5v, v gs =-10v - 15 20 i d =-10a, v gs =-10v r ds(on) *1 - 25 35 m i d =-7a, v gs =-5v g fs *1 - 24 - s v ds =-5v, i d =-10a dynamic ciss - 2815 - coss - 1060 - crss - 955 - pf v ds =-15v, v gs =0, f=1mhz
cystech electronics corp. spec. no. : c391l3 issued date : 2010.12.06 revised date : page no. : 3/9 MTB20P03L3 cystek product specification electrical characteristics(cont.) (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions t d(on) *1, 2 - 12 - tr *1, 2 - 10 - t d(off) *1, 2 - 35 - t f *1, 2 - 7 - ns v dd =-15v, i d =-1a, v gs =-10v, r g =2.7 qg (v gs =10v) *1, 2 - 25 - qg (v gs =4.5v) *1, 2 - 18 - qgs *1, 2 - 7 - qgd *1, 2 - 9 - nc v ds =-15v, i d =-10a, v gs =-10v, rg - 4 - v gs =15mv, v ds =0, f=1mhz source-drain diode i s *1 - - -3 i sm *3 - - -12 a v sd *1 - - -1.2 v i f =i s , v gs =0v trr - 32 - ns qrr - 26 - nc i f =i s , di f /dt=100a/ s note : *1.pulse test : pulse width 300 s, duty cycle 2% *2.independent of operating temperature *3.pulse width limited by maximum junction temperature. ordering information device package shipping MTB20P03L3 sot-223 (pb-free lead plating package) 2500 pcs / tape & reel
cystech electronics corp. spec. no. : c391l3 issued date : 2010.12.06 revised date : page no. : 4/9 MTB20P03L3 cystek product specification typical characteristics -v - drain-to-source voltage(v) -i - drain current(a) 0 0 d 10 20 ds 1 30 40 50 - 3.0v 23 on-region charact erist ics - 6.0v v = - 10v gs - 3.5v - 4.0v - 4.5v - 6 v - i - drain current(a) on-resistance variation with drain current and gate voltage r -normalized drain-source on-resistance 1.6 0.8 0 ds(on) 1.2 1 1.4 10 d 20 2.2 1.8 2.0 2.4 - 4.0 v - 4.5 v - 5 v v = - 3.5 v 30 40 - 7 v - 10 v 50 gs i = -9 a t - junction temperature ( c) r - normalized drain-source on-resistance -50 0.6 0.8 1.0 -25 0 25 50 d v = - 10v 1.2 1.4 1.6 150 100 75 125 175 on-resistance variation with temperature ds(on) j gs - v - gate-to-source voltage(v) r - on-resist ance( ) 2 ds(on) 0.02 0.01 0.03 4 gs 0.06 0.04 0.05 0.07 8 61 0 i = - 5 a d on-resistance variation with gate-to-source voltage t = 125 c a a t = 25 c -v - gate-to-source voltage(v) -i - drain current(a) d 1.5 0 10 gs 22.5 v = - 5v 20 30 40 ds 3.5 34 transf er charact erist ics - 55 c t = 125 c a 25 c body diode forward v oltage variation with source current and temperature 25 c -v - body diode forward voltage(v) 0.6 0.1 0.0001 0 0.001 0.01 sd 0.2 0.4 v = 0v 10 1 100 t = 125 c a gs 0.8 1.0 -55 c 1.2 -is - reverse drain current(a)
cystech electronics corp. spec. no. : c391l3 issued date : 2010.12.06 revised date : page no. : 5/9 MTB20P03L3 cystek product specification typical characteristics(cont.) q - ga t e ch a r g e ( n c) gat e charge charact erist ics - v - gate-to-source voltage(v) gs 0 0 2 4 g 612 6 8 10 d 24 18 30 i = - 10a ds v = - 5v - 15v - 10v - v , drain-to-sourc e voltage(v) capacitance(pf ) 0 0 ds 5 10 25 15 20 30 gs f = 1 mhz v = 0 v ca p a c i t a n c e ch a r a c t e r i st i c s 4000 3200 2400 1600 800 co ss ci ss cr ss dc -v - drain-source voltage( v ) maximum safe operating area -i - drain current( a ) v = -10v single pulse r = 125c/ w t = 25c 0.1 0.01 d 0.1 ds 1 ja a gs r l i m i t 1 10 100 d s ( o n ) 10s 10 100 100 s 10ms 100ms 1s 1ms t ,time (sec) single pulse maximum power dissipation p( p k ) , peak tr an si en t po w er ( w) 20 0.001 10 0 0.1 0.01 1 30 40 50 100 10 11 0 0 0 single pulse r = 125 c/ w t = 25 c ja a t ,time (sec) tr ansi ent ther mal response cur ve r(t ),normalized effect ive tr ansi ent ther mal resi st ance single pulse 0.001 -4 10 10 10 -3 -2 10 -1 dut y cycl e = 0.5 0.05 0.01 0.01 0.02 0.1 0.1 0.2 1 ja 2.r =125 c/ w 100 4.r (t)=r(t) + r 3.t - t = p * r (t ) 11 0 ja j 1000 ja a ja 1.dut y cycl e,d = t2 t1 not es : p dm t1 t2
cystech electronics corp. spec. no. : c391l3 issued date : 2010.12.06 revised date : page no. : 6/9 MTB20P03L3 cystek product specification test circuit and waveforms
cystech electronics corp. spec. no. : c391l3 issued date : 2010.12.06 revised date : page no. : 7/9 MTB20P03L3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c391l3 issued date : 2010.12.06 revised date : page no. : 8/9 MTB20P03L3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c391l3 issued date : 2010.12.06 revised date : page no. : 9/9 MTB20P03L3 cystek product specification sot-223 dimension *: typical inches millimeters 321 f b a c d e g h a1 a2 i style: pin 1.gate 2.drain 3.source marking: 3-lead sot-223 plastic surface mounted package cystek package code: l3 device name date code inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.1142 0.1220 2.90 3.10 g 0.0551 0.0709 1.40 1.80 b 0.2638 0.2874 6.70 7.30 h 0.0098 0.0138 0.25 0.35 c 0.1299 0.1457 3.30 3.70 i 0.0008 0.0039 0.02 0.10 d 0.0236 0.0315 0.60 0.80 a1 *13 o - *13 o - e *0.0906 - *2.30 - a2 0 o 10 o 0 o 10 o f 0.2480 0.2638 6.30 6.70 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0 important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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